Search results

Filters

  • Journals
  • Authors
  • Keywords
  • Date
  • Type

Search results

Number of results: 3
items per page: 25 50 75
Sort by:
Download PDF Download RIS Download Bibtex

Abstract

It has been demonstrated that technologies and methods of intelligent data analysis (IDA) in the educational domain, particularly based on the analysis of digital traces (DT) of students, offer substantial opportunities for analyzing student activities. Notably, the DT of students are generated both during remote learning sessions and during blended learning modes. By applying IDA methods to DT, one can obtain information that is beneficial for both the educator in a specific discipline and for the educational institution's management. Such information might pertain to various aspects of the functioning of the digital educational environment (DEE) of the institution, such as: the student's learning style; individual preferences; the amount of time dedicated to a specific task, among others. An algorithm has been proposed for constructing a process model in the DEE based on log analysis within the DEE. This algorithm facilitates the description of a specific process in the DEE as a hierarchy of foundational process elements. Additionally, a model based on cluster analysis methods has been proposed, which may prove beneficial for analyzing the registration logs of systemic processes within the university's DEE. Such an analysis can potentially aid in detecting anomalous behavior of students and other individuals within the university's DEE. The algorithms proposed in this study enable research during log file analysis aimed at identifying breaches of information security within the university's DEE.
Go to article

Authors and Affiliations

Valerii Lakhno
1
Bakhytzhan Akhmetov
2
Kaiyrbek Makulov
3
Bauyrzhan Tynymbayev
3
Svitlana Tsiutsiura
4
Mikola Tsiutsiura
4
Vitalii Chubaievskyi
4

  1. National University of Life and Environmental Sciences of Ukraine, Kyiv, Ukraine
  2. Abai Kazakh National Pedagogical University, Almaty, Kazakhstan
  3. Caspian University of Technology and Engineering named after Sh.Yesenova, Almaty, Kazakhstan
  4. State University of Trade and Economics, Kyiv, Ukraine
Download PDF Download RIS Download Bibtex

Abstract

In order to compare the pathogenicity of different Tembusu virus (TMUV) strains from geese, ducks and chickens, 56 5-day-old Cherry Valley ducklings which were divided into 7 groups and infected intramuscularly with 7´105 PFU/ml per duck of six challenge virus stocks. The clinical signs, weight gain, mortality, macroscopic and microscopic lesions, virus loads in sera of 1, 3, 5, 7, 11 and 14 dpi and serum antibody titers were examined. The results showed that these viruses could make the young ducks sick, but the clinical signs differed with the different species-original strains. All the experimental groups lose markedly in weight gain compared to the control, but there were no obvious distinctions in weight gains, as well as macroscopic and microscopic lesions of dead ducks between the infected groups. However, the groups of waterfowl-derived strains (from geese and ducks) showed more serious clinical signs and higher relative expressions of virus loads in sera than those from chicken-derived. The mortality of waterfowl groups was 37.5%, and the greatest mortality of chicken groups was 12.5%. The serum antibodies of the geese-species group JS804 appeared earlier and were higher in the titers than others. Taken toghter, the pathogenicity of waterfowl-derived TMUV was more serious than chicken-derived TMUV and JS804 could be chosen as one TMUV vaccine strain to protect from the infection.
Go to article

Authors and Affiliations

Y. Li
Q. Liu
T. Xu
X. Huang
X. Liu
K. Han
Y. Liu
J. Yang
D. Zhao
K. Bi
W. Sun
Download PDF Download RIS Download Bibtex

Abstract

Due to increase in threats posed by offshore foundries, the companies outsourcing IPs are forced to protect their designs from the threats posed by the foundries. Few of the threats are IP piracy, counterfeiting and reverse engineering. To overcome these, logic encryption has been observed to be a leading countermeasure against the threats faced. It introduces extra gates in the design, known as key gates which hide the functionality of the design unless correct keys are fed to them. The scan tests are used by various designs to observe the fault coverage. These scan chains can become vulnerable to sidechannel attacks. The potential solution for protection of this vulnerability is obfuscation of the scan output of the scan chain. This involves shuffling the working of the cells in the scan chain when incorrect test key is fed. In this paper, we propose a method to overcome the threats posed to scan design as well as the logic circuit. The efficiency of the secured design is verified on ISCAS’89 circuits and the results prove the security of the proposed method against the threats posed.

Go to article

Authors and Affiliations

V.A. Deepak
M. Priyatharishini
M. Nirmala Devi

This page uses 'cookies'. Learn more