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Abstrakt

There exist numerous modelling techniques and representation methods for digital control algorithms, aimed to achieve required system or process parameters, e.g. precision of process modelling, control quality, fulfilling the time constrains, optimisation of consumption of system resources, or achieving a trade-off between number of parameters. This work illustrates usage of Finite State Machines (FSM) modelling technique to solve a control problem with parameterized external variables. The structure of this work comprises six elements. The FSM is presented in brief and discrete control algorithm modelling is discussed. The modelled object and control problem is described and variables are identified. The FSM model is presented and control algorithm is described. The parameterization problem is identified and addressed, and the implementation in PLC programming LAD language is presented. Finally, the conclusion is given and future work areas are identified.
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Autorzy i Afiliacje

Grzegorz Andrzejewski
Wojciech Zając

Abstrakt

The multiply-accumulator (MAC) unit is the basic integral computational block in every digital image and digital signal processor. As the demand grows, it is essential to design these units in an efficient manner to build a successful processor. By considering this into account, a power-efficient, high-speed MAC unit is presented in this paper. The proposed MAC unit is a combination of a two-phase clocked modified sequential multiplier and a carry-save adder (CSA) followed by an accumulator register. A novel two-phase clocked modified sequential multiplier is introduced in the multiplication stage to reduce the power and computation time. For image blurring, these multiplier and adder blocks are subsequently incorporated into the MAC unit. The experimental results demonstrated that the proposed design reduced the power consumption by 52% and improved the computation time by 4% than the conventional architectures. The developed MAC unit is implemented using 180 nm standard CMOS technology using CADENCE RTL compiler, synthesized using XILINX ISE and the image blurring effect is analyzed using MATLAB.
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Autorzy i Afiliacje

Rashmi Samanth
1
Subramanya G. Nayak
1

  1. Department of Electronics and Communication Engineering, Manipal Institute of Technology, Manipal Academy of Higher Education, Manipal-576 104, India

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